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Added FMA3 and FMA4 instruction detection

This commit is contained in:
Tom Poole 2019-12-18 15:31:59 +00:00
parent 859315fe4f
commit 54e1004957
6 changed files with 19 additions and 3 deletions

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@ -149,6 +149,8 @@ static String getAllSystemInfo()
<< "CPU model: " << SystemStats::getCpuModel() << newLine
<< "CPU speed: " << SystemStats::getCpuSpeedInMegahertz() << " MHz" << newLine
<< "CPU has MMX: " << (SystemStats::hasMMX() ? "yes" : "no") << newLine
<< "CPU has FMA3: " << (SystemStats::hasFMA3() ? "yes" : "no") << newLine
<< "CPU has FMA4: " << (SystemStats::hasFMA4() ? "yes" : "no") << newLine
<< "CPU has SSE: " << (SystemStats::hasSSE() ? "yes" : "no") << newLine
<< "CPU has SSE2: " << (SystemStats::hasSSE2() ? "yes" : "no") << newLine
<< "CPU has SSE3: " << (SystemStats::hasSSE3() ? "yes" : "no") << newLine

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@ -149,6 +149,8 @@ void CPUInformation::initialise() noexcept
auto flags = getCpuInfo ("flags");
hasMMX = flags.contains ("mmx");
hasFMA3 = flags.contains ("fma");
hasFMA4 = flags.contains ("fma4");
hasSSE = flags.contains ("sse");
hasSSE2 = flags.contains ("sse2");
hasSSE3 = flags.contains ("sse3");

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@ -81,10 +81,14 @@ void CPUInformation::initialise() noexcept
has3DNow = (b & (1u << 31)) != 0;
hasSSE3 = (c & (1u << 0)) != 0;
hasSSSE3 = (c & (1u << 9)) != 0;
hasFMA3 = (c & (1u << 12)) != 0;
hasSSE41 = (c & (1u << 19)) != 0;
hasSSE42 = (c & (1u << 20)) != 0;
hasAVX = (c & (1u << 28)) != 0;
SystemStatsHelpers::doCPUID (a, b, c, d, 0x80000001);
hasFMA4 = (c & (1u << 16)) != 0;
SystemStatsHelpers::doCPUID (a, b, c, d, 7);
hasAVX2 = (b & (1u << 5)) != 0;
hasAVX512F = (b & (1u << 16)) != 0;

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@ -144,11 +144,15 @@ void CPUInformation::initialise() noexcept
hasSSE2 = (info[3] & (1 << 26)) != 0;
hasSSE3 = (info[2] & (1 << 0)) != 0;
hasAVX = (info[2] & (1 << 28)) != 0;
hasFMA3 = (info[2] & (1 << 12)) != 0;
hasSSSE3 = (info[2] & (1 << 9)) != 0;
hasSSE41 = (info[2] & (1 << 19)) != 0;
hasSSE42 = (info[2] & (1 << 20)) != 0;
has3DNow = (info[1] & (1 << 31)) != 0;
callCPUID (info, 0x80000001);
hasFMA4 = (info[2] & (1 << 16)) != 0;
callCPUID (info, 7);
hasAVX2 = (info[1] & (1 << 5)) != 0;

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@ -90,9 +90,9 @@ struct CPUInformation
int numLogicalCPUs = 0, numPhysicalCPUs = 0;
bool hasMMX = false, hasSSE = false, hasSSE2 = false, hasSSE3 = false,
has3DNow = false, hasSSSE3 = false, hasSSE41 = false,
hasSSE42 = false, hasAVX = false, hasAVX2 = false,
bool hasMMX = false, hasSSE = false, hasSSE2 = false, hasSSE3 = false,
has3DNow = false, hasFMA3 = false, hasFMA4 = false, hasSSSE3 = false,
hasSSE41 = false, hasSSE42 = false, hasAVX = false, hasAVX2 = false,
hasAVX512F = false, hasAVX512BW = false, hasAVX512CD = false,
hasAVX512DQ = false, hasAVX512ER = false, hasAVX512IFMA = false,
hasAVX512PF = false, hasAVX512VBMI = false, hasAVX512VL = false,
@ -110,6 +110,8 @@ int SystemStats::getNumCpus() noexcept { return getCPUInformation().num
int SystemStats::getNumPhysicalCpus() noexcept { return getCPUInformation().numPhysicalCPUs; }
bool SystemStats::hasMMX() noexcept { return getCPUInformation().hasMMX; }
bool SystemStats::has3DNow() noexcept { return getCPUInformation().has3DNow; }
bool SystemStats::hasFMA3() noexcept { return getCPUInformation().hasFMA3; }
bool SystemStats::hasFMA4() noexcept { return getCPUInformation().hasFMA4; }
bool SystemStats::hasSSE() noexcept { return getCPUInformation().hasSSE; }
bool SystemStats::hasSSE2() noexcept { return getCPUInformation().hasSSE2; }
bool SystemStats::hasSSE3() noexcept { return getCPUInformation().hasSSE3; }

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@ -172,6 +172,8 @@ public:
static bool hasMMX() noexcept; /**< Returns true if Intel MMX instructions are available. */
static bool has3DNow() noexcept; /**< Returns true if AMD 3DNOW instructions are available. */
static bool hasFMA3() noexcept; /**< Returns true if AMD FMA3 instructions are available. */
static bool hasFMA4() noexcept; /**< Returns true if AMD FMA4 instructions are available. */
static bool hasSSE() noexcept; /**< Returns true if Intel SSE instructions are available. */
static bool hasSSE2() noexcept; /**< Returns true if Intel SSE2 instructions are available. */
static bool hasSSE3() noexcept; /**< Returns true if Intel SSE3 instructions are available. */